Changes to SLE-cache.sm

1) add ff_sendInv_Ack to (Inv, S-> I)
2) add ff_sendInv_Ack to (Inv, SM->IM)
3) diabled the m_possibleCycle assertion in the rollbackTransactionLog method in TransactionManager.C
4) add event for Load_D and Store_D
Store_D needs some care with the ifs
5) trigger an abort for L2_Replacement_XACT, S->I
6) trigger an abort for L2_Replacement_XACT, O->OI
7) trigger an abort for L2_Replacement_XACT, MM->MI
8) trigger an abort for L2_Replacement_XACT, M->MI
Still need to figure out what to do when there is a L2_Replacement_XACT for all the transient sates IM, SM, OM, IS, OI, MI, II !
9)
Add new transition for

transition({M, O, S, I, MM, IM, SM, OM, IS, OI, MI, II}, {Undo_Abort_Store}) {
ccc_undo_abort_store;
j_popTriggerQueue;
}
This transition is necessary to gurantee that if a store triggers an abort, this store will be erased from memory.
10)
transition({M, O, S, I, MM, IM, SM, OM, IS, OI, MI, II}, Load_D){
c_abort_load_hit;
yy_completeAbort;
k_popMandatoryQueue;
}

transition({M, O, S, I, MM, IM, SM, OM, IS, OI, MI, II}, Store_D){
cc_abort_store_hit;
yy_completeAbort;
k_popMandatoryQueue;
}
These two transition need to be have c_abort_load_hit and cc_abort_store_hit so that sequencer will sink the load and store request accordingly. Without this, the sequencer will detect a deadlock because these requests are not satisfied.